/***************************************************
 * pci_csec.h
 *
 * Created on: Mar 20, 2017
 * Author: zjjin@ccore.com
 ***************************************************/

#ifndef _PCI_CSEC_H_
#define _PCI_CSEC_H_

#include "./compate.h"
#include "./jr.h"

#define cpu_2_le32	cpu_to_le32
#define le32_2_cpu	le32_to_cpu
//#define cpu_2_le32	
//#define le32_2_cpu	

#define CSEC_DEV_NAME        "csec"

#define param_vendor  0x9000
#define param_device  0x0003

#define SYS_DMA	0
//#define SYS_DMA GFP_DMA

#define POLL_INVL (1*HZ)
//#define POLL_INVL (10)
#define CDEV_INVL (1*HZ)

#define CMP_TOUT  (1000000)

#define MAIN_DDR
//#define CARD_IHADDR 0x0UL
//#define PCIE_AREA_OFF (0x180000000UL)

#define CARD_IHADDR 0x80000000ULL
#define PCIE_AREA_OFF 0ULL

#define NO_SPLIT_KEY

// #define csec_debug printk
#define csec_debug  noprintk
//#define csec_debug2 printk
#define csec_debug2 noprintk
//#define csec_debug3 printk
#define csec_debug3 noprintk
//#define csec_debug4 printk
#define csec_debug4 noprintk
//#define csec_error printk
#define csec_error noprintk

#define mphys_addr_t u64

#define SEC_ADDR(idx)	(0x00000000e0100000ULL|(CARD_IHADDR<<32))			//c9000
#define INRAM_ADDR		(0x00000000e0310000ULL|(CARD_IHADDR<<32))
#define COMMU_SIZE	0x10

#define SIZE4KI	0x1000
#define DATA_MARGIN 0x1000
#define SIZEMAX	0x11000

#define SGMAX	256

#define IATU_INDEX	(0x900)
#define IATU_CTRL1	(0x904)
#define IATU_CTRL2	(0x908)
#define IATU_LBA	(0x90c)
#define IATU_UBA	(0x910)
#define IATU_LAR	(0x914)
#define IATU_LTAR	(0x918)
#define IATU_UTAR	(0x91c)
#define IATU_CTRL3 	(0x920)

#define CSEC_MAX_COMP (128)

struct ba_t {
	resource_size_t base_phy;
	resource_size_t len;
	unsigned long flags;
	void *base_virt;
};

typedef struct jr_total_st{
	struct jobring jr[Ring_Num];
	int i_nr;
}jrt_st;

struct ccore_cards_t
{
	struct cdev cdev;
	dev_t dev_no;
	struct list_head card_list;
	struct list_head alg_list;
	int current_card;
	int total_cards;
	spinlock_t cardlock ____cacheline_aligned;
	struct class *csec_classp;
	struct device *csec_class_devp;
	struct task_struct *dequeue_thread;
	struct platform_device *pdev;
	atomic_t dq_start_flag;
	wait_queue_head_t dq_start;
	wait_queue_head_t dq_done;
};

struct csec_priv_t
{
	// constant fields
	struct pci_dev *pci_dev;
	struct device *dev;
	struct ba_t ba[6];

	struct ccore_cards_t *ccore_cards;

	struct list_head card_entry;
	int card_idx;
	jrt_st jr_t;
	struct jobring *jr_g;
	int ring_total;
	mphys_addr_t inram_base;
	mphys_addr_t sec_base;
	mphys_addr_t ring_phy;
	void *ring_virt;
	void *commu_virt;
	
	struct tasklet_struct irqtask;
	
	spinlock_t seclock ____cacheline_aligned;

};
struct sym_resource_recovery {
	struct cipher_core cipher;	//class1
	struct cipher_core cipher_class2;	//class2
	unsigned char algs_type; //algorithm types.
	unsigned char algs_name[32];
	struct result result;
	void *callback;
	void *key_in;   //class1
	void *iv_in;	//class1
	void *key2_in;   //class2
	void *iv2_in;	//class2
	void *data_in;

	struct timespec tv;
	struct parm *mparm;
};

struct sym_hash_resource_recovery {
	struct cipher_core cipher;
	struct result result;
	void *callback;
	void *key_in;
	void *iv_in;
	void *data_in;
};

extern void noprintk(const char *fmt,...);

extern dma_addr_t change_addr_for_sec(dma_addr_t addr);

extern dma_addr_t change_addr_for_cpu(dma_addr_t addr);

static inline int miszero(void *addr,u32 len)		//len bust 4bytes alian
{
	int i;
	u32 *maddr = (u32 *)addr;
	for(i=0;i<len/4;i++)
	{
		if(maddr[i]!=0)
			return -1;
	}
	return 0;
}

#endif
